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1.Aim
1.1 This specification is made for:
(1)To standardize the manufacture of the PCB
(2)To being the test criteria for raw materials
1.2 Any item that is not included in this specification,
except the one that has been specified on other
occasion, is all referred to the IPC Standard.
2.Reference
(1)IPC-ML-950C:Performance Spec.for Rigid Multilayer
PCB's
(2)IPC -TM-650:Test Methods
(3)IPC-A-600F:Acceptability of Printed Circuits
Boards
(4)MIL -P-55110D:Military Spec .PWB General Spec.
3.Application Ranges
3.1 Civil use double-sided/multilayer-borads.
3.2 Civil use SMT rigid boards( PC board with at
least 1 SMT component on it is called SMT Board).
3.3 Military use boards: referred to the NIL-P-55110D
or other specifications from the Zhongshan Science
Academy.
3.4 Single-sided boards not included.
3.5 Flexible boards not included.
4.Sequences
of the Specification Application
If this specification is discrepant with others,
followed by this sequence only.
(1)The engineering pattern from customer
(2)IPC Specification
(3)This specification
5.Raw
Materials
5.1 Copper-Clad laminate : It has to be with materials
that are recognized by UL, 94V-0 , 941-1, FR4 or
above.
5.2 Prepreg :In accordance with IPC-L-110A.
5.3 Prepreg : In accordance with IPC-CF-150.
6.Basic Structure
6.1 Inner/outer layer copper foil and lamination.
6.1.1 Double-sided copper foil: Finish at least
1OZ.
6.1.2 As for boards above 4 layers , the upper layer
and lower layer finish at least 1OZ each. Electrical
layer and inner layer 1OZ each.
6.1.3 Lamination: The lamination below is specified
as "A type".
A
6-layer Board for example:
• If the electrical
layer required 2OZ, it is explained on FAB.DWG
• If other type of lamination is required,
explained only on FAB.DWG
6.1.4 Finished Copper thickness requirements (including
the inner/outer layers)
1.Copper foil 0.5OZ Copper thickness 0.6mil
2.Copper foil 1OZ Copper thickness1.2mil
3.Copper foil 2OZ Copper thickness2.4mil
6.2 Layers Distance
6.2.1 Insulativeness between layers is at least
0.0035",if there are other requirements, explained
on FAB, DWG.
6.2.2 Each insulative layer is composed of 1 Prepreg
at least.
6.2.3 The insulative layer thickness between layers
should be piled in symmetry.
6.3 The piling sequence for layers is referred to
the original engineering pattern.
7.Finished
Board Thickness
7.1.1 As for the PCB with the Golden Finger , of
its thickness is 0.062" 0.007,or
specified by the requirement on FAB,DWG.
7.1.2 As for the PCB without the Golden Finger,
of its thickest part is 0.062"0.007,
or specified by the requirement on the FAB. DWG.
8.Conductive
Circuit
8.1 Etching of circuit
8.1.1 Undercut :The thickness of each side should
be not over than the whole copper thickness.
8.1.2 The thickness of each side should be not over
than the whole copper thickness.
8.2 Circuit Width
8.2.1 The finished circuit width should be controled
within the designed tolerance values of0.002,or
20%, referred to the bigger one.
8.2.2 All defect of the circuit(including breaching,
sunkening, scratching etc), should be smaller than
20% of the minimum finished width, length smaller
than 0.5".
8.3 Space
8.3.1 Space between the finished should be controled
within the designed values of0.002" or20%,
referred to the bigger one.
8.3.2 If the circuit is protruded ,it should not
affect 20% of the finished minimum space, length
should not bigger than 0.5".
8.3.3 Minimum space should not be smaller than 0.004.
8.4 Copper Etching
8.4.1 Copper etching should be away from the circuit
0.004 or above.
8.4.2 The copper etching crossing-over between the
2 circuits should not be bigger than 50% of the
space between the 2 circuits, and the longest margin
should not be at 0.032".
8.4.3 The etching copper of the non-circuit part
could be scraped off, but the base material can
not be exposed .
8.5 Keep blank temporarily
8.6 When the length of the open circuit is smaller
than 0.2", it could be patched by Welding,
but on each side, the patching should not be over
than 3 parts. Welding details referred to IPC-R-700B
7.11.
9.Soldering
Mat, Ring Mat.
9.1 The outer ring mat is 0.002"at least. Inner
ring mat of multilayer board is 0.002" at least.
9.1.1 As for the square hole diameter of the unpiercing
which is smaller than 0.018", the ring mat
on the place where is not connected may be trirmmed;
and the one on the connected place 0.002" at
least.
9.2 Square soldering mat nick smaller than 30% of
the mat thickness.
9.3 If the soldering mat pattern is protruded, the
space is diminished, and not smaller 0.005",
the size of the protruded part not over 30% of the
soldering matt width.
9.4 Scratching of the soldering mat is allowed,
but the copper side can not be exposed.
9.5 Cover the tin powders on the mat evenly.
9.6 Under the condition that the circuit is not
affected, Vendor may add Dummy Pad as required,
but the space to conductor is 100mil at least.
10.Hole,Cavity
10.1 The hole diameter and tolerance values referred
to the original design pattern. If it is not marked,
the hole diameter tolerance value is as followings.
10.2 The Tooling hole around the board sides(Generally
0.157"), is required to be made at one time.
10.3 The hole wall of the single hole, crevasse
of the copper plating should be not more than 3
points, and the whole areas of the cleaving should
be not over 10% of the hole wall areas. Copper exposure
not allowed.
10.4 Keep blank temporarily.
10.5 Do not miss drilling the holes.
10.6 The Vendor might require more drilling holes
on the board margin on condition that the circuit
is not affected.
10.7 If there are tin knots inside the hole, its
size still has to be accorded with the specification.
10.8 The round rupture should not appear inside
the hole wall.
10.9 The hole wall should be cleared of any paste
residues. The materials removed from the landscape
orientation of the wall should not be over than
0.002".
10.10 Hole Test Point
10.10.1The test point hole within the BGA range
should be tapped by seals on the C side. Tin spraying
on the S side.
10.10.2 The test point hole outside the BGA Range,
opened by the 2 sides and the hole shall not be
sealed. Make a soldering resistance bigger than
drilling hole 2mils on the C side.
11.Tin
Soldering
11.1 Plating and tin soldering are both in good
condition, and there should be not any Non-Wtting
situations.
11.2 The De-Wetting part of the Soldering Mat(Not
included Via Hole)
3%.
12.Thickness
of plating Au
Plating Material
|
Thickness |
| Au |
Over 0.000015", pureness 99%. |
| Ni |
Before Golden Finger plating, plate the
low stress nickel over than 0.00010". |
| Co |
Suface thickness over than 0.001, via hole
0.0008".
above, take 3 points on each side, average
values bigger than 0.0008". |
Tin, lead
|
Content:Tin 50%-70%, Lead 30%-50%. |
| Tin spraying |
Thickness over 0.0001-0.001. |
• If there are other special
requirements for the plating thickness, explained
on the FAB.DWG
12.1 Adhesiveness Test: paste a bond tape of 3MscotchNo.6000.5"
on the plating layer, and its length is over than
1", After 30 seconds, draw up from a 90 angle
plumbly, and there should be not any falling off
or turning up.
12.2 ENTEK thickness 0.00000025m-0.00000045m.
12.3 The minimum value of the QEP tin spraying is
0.0001",max 0.001.
12.4 The minimum values of the BGA tin spraying
thickness is 0.0001-0.001, but the tolerance between
any point should not be bigger than 0.0002(measure
5 points on both side and the middle).
12.5 SMT Copper Pad, the minimum values of tin-spraying
thickness 0.00006", max 0.001".
13.Golden Finger
13.1 The sizes of chamfer, bevelling and Fillet
R are all referred to the engineering pattern, if
it is not marked, the specified sizes are as followings:
Fillet R:0.062"Rad.0.008"
Chamfer :0.039"0.012"X45°(1mm0.3mmX45°)
Bevelling:PCI->0.070"+0.010"-0.015"x20°(1.778mm+0.254-0.381mmX20°)
AGP->0.045"+0.005"-0.005"x20° (1.143mm+0.127-0.127mmX20°)
13.2 cratching on the Golden Finger: Use the 5-times
magnified lamp, away from the Finger 30cm, and check
plumbly from 45° with 2 sources of lights:
1.Both lights are visible, and the scratching length
<0.1". After 10-times magnified, there are
no copper and nickel exposed, if it is not over
3 points, it is allowed for the single board.
2.Distinctions for scratching seen by only one light
are as followings.
(A)It is accepted that if the roughness of the single
point vein is not over than 0.05".
(B)For the strip scratching with length not over
0.05", if the area is not bigger than .1/3
of the whole Golden Finger size, it is accepted.
3.It is not accepted that there are any scratching
to make aberration.
13.3 The tolerance for the Finger width is 0.006".
13.4 It is not accepted that the finger's surface
is stained by any chemical lotions or vapour.
13.5 There should not be copper oxidation on the
Finger and the connection point, and the circuit
has to be in a good order.
13.6 There should not be any residues of pastes,
lacquer, veins seals and the tin knot on the surface
of the Golden Finger.
13.7 It is accepted that the sunkening of the Finger
(copper or nickel is not exposed) is not over than
0.01".
13.8 The copper on the bevelling parts of the Finger
is allowed to be exposed.
13.9 Adhesiveness Test referred to 12.1.
14.Soldering Mask
14.1 The printing color are both green, any special
requirement will be explained on the FAB. DWG.
14.2 Materials for Non-SMT board: PC401 or the same
class.
14.3 Liquid Film S/M(PSR-4000,DSR-2200),fc401.Materials
for SMT board: Liquid Film S/M(PSR-4000,DSR-2200),fc401
or the same class.
14.4 Cover the circuit with the soldering mask completely,
and no copper or tin exposure. Patching of the mask
is allowed, requirements as followings:
A: color or materials in match.
B: When the component area of the SMT is patched,
the scope for patching has to be within 0.050".
the thickness of patching has to be within 0.003",
other within 0.006.
C: When the circuit area is patched(The patching
part is away from the circuit >250"), the scope
is: length not over than 1", width not over than
0.060".
D: If there are no copper exposures on the soldering
mask, no need to patch.
E: only 12 patches could be made for each piece
most.
F: QFP area patching S/M specified as followings:
| Method of patching |
Scope |
Quantities |
| Spot patching |
Diameter<0.1"
Diameter0.1"-0.15"
Diameter>0.15 |
4
2
1 |
| Linear patching |
Length 1"Width 0.5" |
2 |
14.5 The shadow , made by the component hole soldering
mat, should keep a space of 0.002" or above to the
hole, cavity, on the component side or soldering
side.
14.6 The soldering mask might enter into or cover
the Via hole of the SMT.
14.7 There should not be any soldering mask on the
Finger.
14.8 The circuit or base materials should not be
appeared when the soldering mask is scratched.
14.9 All products:
1.for the MOTHER BOARD, tap the hole.
2.If other board need to be taped, explained on
FBICATION DRAWING NITE.
3.No tin knot residued inside the hole.
4.The VIP and VBP hole need to be tapped, and the
tapping of VIP deep into 60%-80% of the hole, VBP
fully.
14.10 Adhesiveness Test: referred to IPC-TM-650
2.4 28.1, or IPC-SM-840A class III Test.
14.11 No soldering mask on SMT PAD.
15.Dicing
Test
15.1 The dicing test(for plating and copper foil
thickness) referred to IPC-TM-6502.1.1
Test Items:
(1)Laminate integrity:IPC-ML-950C class II
(2)Plating through hole integrity after stress:IPC-ML-950C
class II.
15.2 When the sample is shipped, the dicing analysis
has to be attached.
15.3 Before the PCB is shipped, a short circuit
test is required, and add "T" Seal near the Dte
Code.
15.4 Condititions for short and open circuit test.
| |
Voltage
|
Resistance |
open circuit
|
200V |
10M |
| short circuit |
200V |
20 |
16.Mark Printing, Legend
16.1 The colors for the marking and legend are all
white if there are no special requirements.
16.2 Printed on the component side only if there
are no special requirements for the marking and
legend.
16.3 The mark and legend have to be very clear,
and easily identified despite of some breaking off
of the lines.
16.4 No fringes for the marking and legend.
17.Appearance
17.1 The board edges have to be flat, instead of
to be rough and scared.
17.2 The value for the distortion and wrapping of
the board do not over the thickness of the board.
17.3 Acceptance for the bare board which contains
the disadvantages as followings, referred to IPC-6012.
(1)Exposed fibers
(2)whiteness around the hole
(3)white stain
(4)Breaching
(5)Alveoli
(6)Layer-stripping
17.4 No ink residues, corrosive dirts or other contaminations
on the board surface.
17.5 The tolerance for the outer size should be
accorded to the engineering pattern. If it is not
explained, the datum is 0.010".
17.6 The manufacturer's UL code ,date and Vendor
mark should be appeared on the soldering side as:
YY WW.
18.Package
18.1 The actual package method may be different,
but you can put at least 10 pieces PCB in one plastic
bag and pile the dampproof paper between each board.
18.2 The size of the package box must be appropriate,
and the protection materials such as sponge or air
bag must be used as liner inside. Nylon is prohibited.
19.V-cut and breaking
off hole
19.1 V-CUT: when the board thickness is 1.6mmjf,
average remnant thickness is 0.370.08mm, other
board remnant thickness 0.35mm6.-0.45mm, cut-in
angle 30-40" ,displaying card board thickness is
1.6mm. If its typeset need a v-cut, the remnat thickness
is 0.5mm0.125mm.
19.2 There 2 kinds of breaking off.
19.2.1(1)The breaking off hole in normal use is
sunken 20.5mil inside the board, when the circuit
is padded, try to avoid.
19.2.2(2)Used for high intensive boards.
19.2.3 Space between 2 neighboring breaking hole:
when the board thickness is 1.6mm, 2cm; 1.0mm, 1.5cm.
19.3 If there are special requirements for the v-cut
and hole breaking, explained on FAB.DWG.H. |
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